1. Field of the Invention
The present invention relates generally to semiconductor devices, and more particularly to a method for electrically identifying mask vintages in semiconductor memory modules.
2. Description of Related Art
Mask identification remains important to several areas of design and manufacturing. In the design of semiconductor components, each design update requires confirmation that the correct mask vintages were used. This can be achieved by characterizing the exact vintage of each chip/module being tested. In manufacturing testing, the ability to separate different chip vintages facilitates identifying the pedigree of the devices under test for subsequent investigation. Similarly, in engineering failure analysis, the ability to know the mask vintage without resorting to visual identification remains beneficial to the investigating engineer.
After processing, testing, and packaging, it is difficult to keep track of particular mask changes and variations from lot to lot, or wafer to wafer. Typically, paper records of changes are employed to maintain the current status of each mask, however, these records often remain incomplete, requiring significant cost to keep current.
Visual mask marks, added to the surface of memory chips, have been used for a number of years to identify the mask vintage of fabricated semiconductor devices. This visual method, however, is only successful if the surface of the chip remains visible throughout the chip's fabrication.
Other methods, such as etching the surface of the semiconductor wafer to form visibly identifiable characters, have also been employed for the purpose of identifying the fabrication status of the wafer.
Recent advances in characterizing semiconductor dies have been realized using electrical identification. In some instances, fusible links have been used in a readable binary fashion for coding the status of semiconductor devices.
Methods to electrically interrogate a test circuit on a semiconductor chip containing fabrication information have become more prevalent due, in part, to their ability to encode more information within a smaller area of the die. Additionally, different types of electrical identification methods have been introduced which are more adaptable to accommodating the numerous changes during the device fabrication process. For example, in U.S. Pat. No. 4,419,747 issued to Jordan on Dec. 6, 1983, entitled, "METHOD AND DEVICE FOR PROVIDING PROCESS AND TEST INFORMATION IN SEMICONDUCTORS," a memory array on the chip is modified to include processing and test information. The array is typically a non-volatile EEPROM type, however, fusible-link devices or laser blown fuses are also known in the art for such construction. With this technique, product information disclosed may include fabrication lot number, wafer number, and the array location within the die, referred to as the die position number. Although not a common practice, mask vintages may also be recorded using this technique since the binary encoded format is capable of alternative designations. However, in all of the above fuse or array constructions, the components are fabricated separately, from technologies other than those used to fabricate the mask, thus requiring extra process steps during fabrication.
Similarly, in U.S. Pat. No. 5,642,307 issued to Jernigan on Jun. 24, 1997, entitled, "DIE IDENTIFIER AND DIE IDENTIFICATION METHOD," an identification section is fabricated onto a semiconductor that includes structure for storing and reading die-specific information that characterizes the particular integrated circuit. The structure for storing is a memory section, typically non-volatile, or may also be fuse-programmable. An enabling circuit initiates the reading structure for interrogating the memory or fuse devices. Although capable of designating mask vintage information, this method requires additional device fabrication of various technologies to employ the memory or fuse-programmable circuitry necessary to retain the semiconductor fabrication status information. Thus, there remains a need in the art to reduce the complexity associated with encoding semiconductor fabrication information on a device, and especially for encoding mask vintage information.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of identifying unique design characteristics of semiconductor mask levels.
It is another object of the present invention to provide an identification section on a semiconductor device for storing die specific information using the available mask technology.
A further object of the invention is to provide an inexpensive, reliable device for providing identification of design characteristics and other key parameters of semiconductors.
It is yet another object of the present invention to provide a method, whereby mask vintage information for a semiconductor device may be obtained through electrical interrogation of the device.
Still other advantages of the invention will in part be obvious and will in part be apparent from the specification.